This is a code for two 6 bit serial adder.It acts like a scoreboard.iam getting a compiling error " cannot read output q ".please help me out of this.
library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; entity board IS port ( C: in std_logic; h : in std_logic_vector(5 downto 0); q : out std_logic_vector(5 downto 0) -- s,cout : out std_logic ); end board; architecture archi of board is signal tmp: std_logic_vector(5 downto 0); begin process(C) begin if(C'event and C='1') then tmp<= std_logic_vector (unsigned(q) + unsigned(h)); end if; end process; q<=tmp; end archi;
For some reason (why?) you cannot read from output ports directly. Create an internal signal, e.g.
q_i, replace all
q_i and assign the internal signal to the output port, i.e.
q <= q_i.
On a further note, your
tmp signal is not necessary. You can write
q_i <= std_logic_vector((unsigned(q_i) + unsigned(h)); in a clocked process.